Over the course of 50 years we have grown to become a global company that develops innovative solutions for our customers, and manages the best interests of our investors, our employees, society and other stakeholders. Read on to discover what we achieved in 2018.



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The demand for smaller, faster and cheaper semiconductor chips continues to rise, driven by advancements in cloud computing, artificial intelligence, smartphones and the Internet of Things.


Our technology is the first step towards making it all possible, as our R&D investment in new materials, new products and new processes means we can help our customers develop their technology roadmap, and further extend Moore’s Law.


In 2018, this led to the introduction of the Synergis ALD tool, which leverages the core technologies from our Pulsar and EmerALD ALD products for high productivity thermal ALD applications. The new Synergis tool allows us to address more ALD applications and therefore increases our served market. Together with our other products and services, this contributed to our strong financial results, which included:

  • net sales of €818 million;
  • bookings of €942 million;
  • operating result of €124 million; and
  • operating cash flow of €137 million.


Strategy & business

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We operate in a fast-paced industry that continues to reshape the world, and our innovative technology enables the semiconductor industry to achieve advancements in computing, communications, energy, transportation, medicine and beyond.
To ensure that we can continue to make a difference to our customers, employees, and company stakeholders, in 2018 we concentrated on the following three key elements of our strategy.


In addition to our fundamental R&D efforts, we continuously expand and deepen our strategic cooperation with key customers, suppliers, chemical manufacturers, and research institutes. This approach enables us to remain innovative and swiftly meet the changing demands of our customers.


We are a key player in the deposition equipment segments for ALD and epitaxy, and a focused niche player for PECVD and vertical furnaces. As a leader in the segment, ALD has turned into a key growth driver for our business, from which we support virtually all of the leading customers in the semiconductor industry. Our newest ALD tool, Synergis, is designed to address a wide range of existing and new ALD applications, effectively increasing the market we serve.


In addition to our internal optimization programs, we are working with our suppliers to improve fundamental quality through statistical methods and process controls. In addition to addressing the technology needs of our customers, we also focus on further increasing equipment throughput and equipment reliability, thereby lowering the cost per wafer of our wafer processing systems.


Performance review

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In 2018, we achieved revenue growth of 11% reaching a record high revenue of €818 million, with sales increasing mainly in the logic, DRAM and analog segments. By industry segment, our 2018 revenue stream was led by memory, closely followed by the logic and foundry segments.


While our ALD product lines continued to be our key sales driver in 2018, accounting for more than half of total equipment revenue, our other product lines also contributed strongly. In our epitaxy product line we increased sales, following the strong growth we achieved in 2017, and we saw additional sales increases in PECVD and vertical furnaces.


Our industry experienced continued growth in 2018, with worldwide semiconductor industry sales increasing by around 14%. This was driven by high memory prices and broad-based electronics demand for cloud services, mobile devices, automotive and industrial applications. These drivers helped the wafer fab equipment market grow by around 10% in 2018.



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Our 2018 sales grew to record levels, reaching €818 million. ALD continued to be the key driver, although the other product lines also made a strong contribution.
We benefited from a further increase in wafer fab equipment spending following the very strong market growth in 2017. Our operating profit increased to €124.3 million from €113.2 million in 2017, while the operating profit margin remained stable.


New bookings increased by 22% in 2018 to €942 million, with equipment bookings for ASMI as a whole led by logic, followed by foundry and then memory. Total research and development (R&D) expenses, excluding impairment charges, decreased by 1% in 2018 compared to 2017, mainly as a result of higher capitalization of development expenses.


Financial statements

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Our 2018 sales grew to record levels, reaching €818 million. ALD continued to be the key driver, although the other product lines also made a strong contribution.
We benefited from a further increase in wafer fab equipment spending following the very strong market growth in 2017. Our operating profit increased to €124.3 million from €113.2 million in 2017, while the operating profit margin remained stable.


New bookings increased by 22% in 2018 to €942 million, with equipment bookings for ASMI as a whole led by logic, followed by foundry and then memory. Total research and development (R&D) expenses, excluding impairment charges, decreased by 1% in 2018 compared to 2017, mainly as a result of higher capitalization of development expenses.


Other Information

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During 2018, we returned approximately €607 million to shareholders in the form of dividends, share buybacks and the capital return. This was up from €281 million in 2017 and €140 million in 2016.
Over the 2010-2018 period, we returned more than €1.6 billion to the financial markets through dividends, share buybacks, return of capital, and buyback of convertible bonds.


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In 2018, we paid a dividend of €0.80 per common share and we will propose to the forthcoming AGM to declare a dividend of €1.00 per share for 2019. The proposed 2019 dividend will mark the ninth consecutive year that we have paid a dividend.


Semiconductor chips are used in virtually all electronic products, even expanding into products such as appliances, garage door openers, and factory tools. From microprocessors, memories, and power devices, to image sensors, and analog devices, chips are critical to the global economy. Their use has revolutionized how we live, work, and play, enabling us to understand, create, and share information faster and more easily. Behind this lies the hugely complex manufacturing process that makes semiconductor chips a reality, and which gets increasingly complex every year.


The process of manufacturing semiconductor devices on a silicon wafer can be divided into three distinct parts:

  • silicon wafer manufacturing;
  • transistor formation (known as the Front-end of the line (FEOL) process steps); and
  • interconnect formation (known as the Back-end of the line (BEOL) process steps).

At ASMI, we develop, manufacture and sell equipment, and provide services used by semiconductor device manufacturers, for each of these three stages of wafer processing.


In the wafer manufacturing process, a large single crystal of very pure silicon is grown from molten silicon. The crystal is then sliced into a large number of thin slices, or wafers, of single crystalline silicon. These slices are polished to an atomic-level flatness before the next steps are executed. For advanced applications, some layers are deposited on the wafer for later use, by either epitaxy or diffusion/oxidation. Epitaxial wafers are even flatter and contain fewer surface defects than polished wafers.


During FEOL and BEOL wafer processing, multiple thin films of either electrically-insulating material, also called dielectrics, or conductive material are modified, grown, or deposited on a silicon wafer. This involves the following steps:

  • first, several material processing cycles are used in the FEOL to build the basic transistor and other components such as capacitors and resistors; and
  • second, several processing cycles are used in the BEOL to electrically connect the large number of transistors and components, and to build additional passive components such as capacitors, inductors, and resistors. Patterning of deposited layers with lithography and etching creates the transistors, passive components, and connecting wires, which together make up the integrated circuit. Each integrated circuit is a single chip or a die on the wafer.

A finished wafer may contain several dozen to several thousand individual dies. Wafer processing is performed either one wafer at a time in single-wafer processing systems or many wafers at a time in batch processing systems. Some single-wafer systems have multiple processing chambers on the same system platform for increased productivity. Multiple deposition and patterning processes are performed on the same wafer to complete a device.


The number and precise order of the process steps varies depending upon the complexity and design of the integrated circuit. The performance of the circuit is determined in part by the various electrical characteristics of the materials used in the layers of the circuit and the wafer. Simple circuits may have as few as ten layers, while complex circuits may have more than one hundred layers. The device manufacturing process is capital-intensive, requiring multiple units of several different production systems. Many different but complementary methods are used to modify, grow, or deposit materials on the wafers. The device manufacturing process on the wafer is complete when all of the layers have been deposited and patterned on the wafer.


The introduction of even trace levels of unwanted foreign particles or material can make a circuit, or even an entire wafer, unusable. To reduce the level of foreign particles or material, wafer processing is performed in cleanrooms with ultra-low particle and contamination levels. The correct electrical functioning of the integrated circuits on each die is confirmed by probing. Non-functioning circuits are marked so they can later be discarded before money is spent on packaging the chip. The yield – or the percentage of known good die for a mature process – is usually well above 95%. For a process in development, the yield can be substantially lower, and it is important to improve this as quickly as possible as it determines, to a large extent, the profitability of our customers.


There are two basic segments of chip manufacturing to complete a final packaged chip product. We refer to them as wafer processing (Front-end), and assembly and packaging (Back-end), which are usually in different manufacturing facilities. We are an equipment supplier for the Front-end wafer processing part.

During wafer processing – the start of the manufacturing line – manufacturers process wafers made of silicon, on which the electrical components are formed. During assembly and packaging – the end of the manufacturing line – the wafers are divided up into individual chips and tested before being assembled and packaged.


It all starts with one simple, common substance: sand. The silicon found in sand is in the form of silicon dioxide. To make chips, manufacturers need pure silicon, which means the first step in the process is to separate the silicon from the oxygen molecules. The pure silicon needed to make silicon chips can have only one foreign atom for every billion silicon atoms. It must also be in monocrystalline form. The way atoms are organized in this form of silicon is essential to some of the later processes.


The silicon is then extracted, or pulled, from liquid silicon in the form of long cylindrical ingots at around 1,400 degrees Celsius.


Wafers are then cut from the ingots before being polished to produce a smooth surface. They are then sent to chip manufacturers for processing. The next steps in wafer processing are then repeated many times to create the finished wafer that contains chips.


The wafer is put into a high-temperature furnace and exposed to oxygen, forming a layer of silicon dioxide on the surface. Then chemical vapor deposition (CVD) is used to add a layer or film of nitride.


Once the circuit layout of the chips has been designed, glass plates or masks are created which help copy the design onto the surface of the wafer. Several masks are used in sequence to add more complexity to the chips.


Now comes the time to begin creating the design on the surface of the wafer using the masks as a guide. Photolithography, a type of optical printing, is used. The wafer is first coated with photoresist, which changes when exposed to ultraviolet (UV) light. The mask is placed above the wafer and precisely aligned with it. UV light shining above the mask reacts with the exposed parts of the photoresist, creating a pattern. The wafer is covered with a developing solution to develop these patterns, which are then etched, leaving the parts not exposed to UV light intact. The surface now contains 'trenches' or other features that run across the surface.


A dielectric or insulating film is deposited in the trenches by one of a number of deposition technologies such as CVD or ALD or PEALD. Gates are formed between the trenches, creating parts of the many millions of transistors that may be created on a single chip. Gates can be switched to allow charge carriers, such as electrons, to flow or to prevent them from flowing. Contacts are formed by each gate to create a source and drain. Ion implantation is used to implant special elements into the wafer for the source and drain. The charge carrier enters a gate channel at the source contact and exits at the drain contact.


Once the basic chip components have been created, they need to be connected. The same processes of lithography, etching, and deposition are used to form trenches filled with metal connections. These connections between components are created not just on one level, but on many. The finished wafer will contain up to several thousand individual chips in a space of 200mm to 300mm diameter wafers, and some chips can hold billions of transistors.


Once wafer processing has been completed, the finished wafers are transported to another plant for cutting, assembly, and packaging. The individual wafers are cut into separate chips.


The chips are then placed on a lead frame carrier.


Each chip is then tested before being packaged to be sent for placement on circuit boards.



Over the past 50 years we have grown to become a leading global supplier
of semiconductor wafer processing equipment. A company that develops
innovative process solutions for our customers, and manages itself in the best
interests of our investors, our employees, society, and other stakeholders.

Yet now is the time to enter a new era of innovation, to embark on the next
phase of growth. We understand that this requires commitment and strength
across many areas. From innovation in R&D, to advancing new technologies
and addressing new applications. From developing our people, to creating
even stronger relationships with key customers.

This is how we will take the next leap forward.


Of new materials






Our roadmap to the future will enable us to not only
achieve our next phase of growth, it will ensure we
can continue to help our customers achieve their
technology roadmaps for next-generation devices.


Our technology helps drive innovation, increasing the number of scientific breakthroughs, many of which are achieved from our advanced process equipment that deposits new materials with precision and productivity, positively benefiting society in sectors from healthcare and education, to transport and energy.


For semiconductor manufacturers, scaling chips
to smaller dimensions is an ongoing challenge.
Our innovations and equipment are vital in helping make many of these transitions happen.


Striving for efficiency ensures that our
customers get the products, services,
and results they expect. Intensifying
our focus on efficiency will make us a
stronger company, ready to take the
next leap forward.







We are a multinational company that
embraces diversity in every sense
of the word. With 29 different
nationalities working across the
company, we combine our talents
to drive innovation.


Achieving our ambitions takes intelligence, knowledge, skill,
determination, and dedication. And it is this combination of
qualities that we nurture in our people.


Our goal is to impact tomorrow’s generation
as positively as we’ve impacted today’s.
Making this happen takes the xtraordinary
talent of our people, who work together
to drive innovation and deliver excellence.

Expanding the






Collaboration is fundamental to our
continued success; from working
with our customers to optimize our
equipment and processes to enable
their technology roadmaps, to
creating partnerships on cutting-edge
research and development.


Operational excellence is one of the essential
pillars of our strategy, which enables us to provide
our customers with the high-quality, leading-edge
products and services they demand.


R&D is central to our development,
leading to new device architectures,
new materials, and new processes
that strengthen our competitive
positioning and enable our customers
to deliver the next-generation chips.


By extending our technological scope with a
more diverse product portfolio, we can help our
customers continue to advance their business
while growing our own in new market segments.

Moore with






We create long-term value for our
stakeholders in a variety of ways.
From working with our customers
to develop innovative solutions, to
ensuring value creation growth
and positive investor returns.


We are committed to positively
contributing to society and
reducing our impact on the
environment. Only then can
we truly say we are helping
create more with less.


We believe sustainability takes many forms.
From developing sustainable technology
roadmaps for our customers, to creating
a sustainable living environment for all.


Safety is a front-line requirement,
which is why our ZERO HARM!
policy outlines our vision on product
safety, and our CR policy lays out
our commitment and expectations
towards health and safety.